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  www.irf.com 1 07/21/2010 IRF6702M2DTRPBF irf6702m2dtr1pbf directfet   power mosfet  applicable directfet outline and substrate outline   

       directfet  isometric description the irf6702m2dpbf combines two mosfet switches optimized for high side applications into a single medium can directfet package. the switches have low gate resistance and low charge along with ultra low package inductance providing significant reduction in switching losses. the reduced losses make this product ideal for high efficiency multiphase dc-dc converters that power the latest genera tion of processors operating at higher frequencies. the irf6702m2dpbf combines the latest hexfet? power mosfet silicon technology with the advanced directfet tm packaging to achieve the highest power density for two mosfets in a package that has the footprint of a so-8 and only 0.7 mm profile. the di rectfet package is compatible with existing layout geometries used in power applications, pcb assembly equipment and vapor phase, infra -red or convection soldering techniques, when application note an-1035 is followed regarding the manufacturing methods and processes. t he directfet package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resi stance by 80%. fig 1. typical on-resistance vs. gate voltage fig 2. typical total gate charge vs gate-to-source voltage  click on this section to link to the appropriate technical paper.  click on this section to link to the directfet website.   surface mounted on 1 in. square cu board, steady state.  t c measured with thermocouple mounted to top (drain) of part.   repetitive rating; pulse width limited by max. junction temperature.  starting t j = 25c, l = 0.99mh, r g = 25 ? , i as = 12a.   s1 s2 sb m2 m4 ma l4 l6 l8 2 4 6 8 10 12 14 16 18 20 v gs, gate -to -source voltage (v) 0 5 10 15 20 25 t y p i c a l r d s ( o n ) ( m ? ) i d = 15a t j = 25c t j = 125c applications  dual common drain control mosfets for multiphase dc-dc converters features  replaces two discrete high side mosfets  optimized for high frequency switching  low profile (<0.7 mm)  dual sided cooling compatible  ultra low package inductance  compatible with existing surface mount techniques  rohs compliant and
   100% rg tested q g tot q gd q gs2 q rr q oss v gs(th) 9.4nc 3.3nc 1.2nc 17nc 6.3nc 1.8v v dss v gs r ds(on) r ds(on) 30v max 20v max 5.2m ? @ 10v 8.6m ? @ 4.5v 0 5 10 15 20 25 q g total gate charge (nc) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 24v v ds = 15v i d = 12a d d g1 g2 s1 s2 absolute maximum ratin g s ( each die o p eratin g consecutivel y) parameter units v ds drain-to-source voltage v v gs gate-to-source voltage i d @ t a = 25c continuous drain current, v gs @ 10v i d @ t a = 70c continuous drain current, v gs @ 10v a i d @ t c = 25c continuous drain current, v gs @ 10v  i dm pulsed drain current  e as single pulse avalanche energy  mj i ar avalanche current  a 71 max. 13 47 130 20 30 15 12
irf6702m2dtr/tr1pbf 2 www.irf.com    repetitive rating; pulse width limited by max. junction temperature.  pulse width 400s; duty cycle 2%. static @ t j = 25c (each die unless otherwise specified) parameter min. typ. max. units bv dss drain-to-source breakdown voltage 30 ??? ??? v ? v dss / ? t j breakdown voltage temp. coefficient ??? 20 ??? mv/c r ds(on) static drain-to-source on-resistance ??? 5.2 6.6 m ? ??? 8.6 11.3 v gs(th) gate threshold voltage 1.35 1.8 2.35 v ? v gs(th) / ? t j gate threshold voltage coefficient ??? -7.2 ??? mv/c i dss drain-to-source leakage current ??? ??? 1.0 a ??? ??? 150 i gss gate-to-source forward leakage ??? ??? 100 na gate-to-source reverse leakage ??? ??? -100 gfs forward transconductance 34 ??? ??? s q g total gate charge ??? 9.4 14 q gs1 pre-vth gate-to-source charge ??? 2.2 ??? q gs2 post-vth gate-to-source charge ??? 1.2 ??? nc q gd gate-to-drain charge ??? 3.3 ??? q godr gate charge overdrive ??? 2.7 ??? see fig. 2 q sw switch charge (q gs2 + q gd ) ??? 4.5 ??? q oss output charge ??? 6.3 ??? nc r g gate resistance ??? 0.4 ??? ? t d(on) turn-on delay time ??? 14 ??? t r rise time ??? 41 ??? t d(off) turn-off delay time ??? 15 ??? ns t f fall time ??? 20 ??? c iss input capacitance ??? 1380 ??? c oss output capacitance ??? 290 ??? pf c rss reverse transfer capacitance ??? 120 ??? diode characteristics parameter min. typ. max. units i s continuous source current ??? ??? 32 (body diode) a i sm pulsed source current ??? ??? 130 (body diode)  v sd diode forward voltage ??? ??? 1.0 v t rr reverse recovery time ??? 16 24 ns q rr reverse recovery charge ??? 17 26 nc di/dt = 370a/s  t j = 25c, i s = 12a, v gs = 0v  showing the integral reverse p-n junction diode. v gs = 4.5v, i d = 12a  v ds = v gs , i d = 25a t j = 25c, i f =12a v gs = 4.5v i d = 12a v gs = 0v v ds = 15v i d = 12a v dd = 15v, v gs = 4.5v  conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 15a  v gs = 20v v gs = -20v v ds = 24v, v gs = 0v v ds = 15v v ds = 24v, v gs = 0v, t j = 125c mosfet symbol r g = 6.8 ? v ds = 15v, i d =12a conditions ? = 1.0mhz v ds = 16v, v gs = 0v
irf6702m2dtr/tr1pbf www.irf.com 3 fig 3. maximum effective transient thermal impedance, junction-to-ambient    surface mounted on 1 in. square cu board, steady state.  t c measured with thermocouple incontact with top (drain) of part.  used double sided cooling, mounting pad with large heatsink.  mounted on minimum footprint full size board with metalized back and with small clip heatsink.
r is measured at   
   surface mounted on 1 in. square cu board (still air).   mounted on minimum footprint full size board with metalized back and with small clip heatsink. (still air) 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 10 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 10 100 t h e r m a l r e s p o n s e ( z t h j a ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthja + tc ri (c/w) i (sec) 3.1440 0.000878 23.201 0.291662 19.855 1.970485 9.7220 0.027200 j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 ci= i / ri ci= i / ri a a 4 4 r 4 r 4 absolute maximum ratin g s ( each die o p eratin g consecutivel y) parameter units p d @t a = 25c power dissipation w p d @t a = 70c power dissipation p d @t c = 25c power dissipation  t p peak soldering temperature c t j operating junction and t stg storage temperature range thermal resistance ( each die o p eratin g consecutivel y) parameter typ. max. units r ja junction-to-ambient  ??? 56 r ja junction-to-ambient  12.5 ??? r ja junction-to-ambient  20 ??? c/w r jc junction-to-case  ??? 5.9 r j-pcb junction-to-pcb mounted 1.0 ??? linear derating factor  w/c 0.018 270 -55 to + 175 max. 25 2.7 1.9
irf6702m2dtr/tr1pbf 4 www.irf.com fig 5. typical output characteristics fig 4. typical output characteristics fig 6. typical transfer characteristics fig 7. normalized on-resistance vs. temperature fig 8. typical capacitance vs.drain-to-source voltage fig 9. typical on-resistance vs. drain current and gate voltage 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.01 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 10v 5.0v 4.5v 4.0v 3.5v 3.0v 2.8v bottom 2.5v 60s pulse width tj = 25c 2.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 2.5v 60s pulse width tj = 175c vgs top 10v 5.0v 4.5v 4.0v 3.5v 3.0v 2.8v bottom 2.5v 1 2 3 4 5 6 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 175c t j = 25c t j = -40c v ds = 15v 60s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 t y p i c a l r d s ( o n ) ( n o r m a l i z e d ) i d = 15a v gs = 10v v gs = 4.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0 25 50 75 100 125 150 i d , drain current (a) 4 6 8 10 12 14 16 18 20 22 t y p i c a l r d s ( o n ) ( m ? ) t j = 25c vgs = 3.5v vgs = 4.0v vgs = 4.5v vgs = 5.0v vgs = 10v
irf6702m2dtr/tr1pbf www.irf.com 5 fig 13. typical threshold voltage vs. junction temperature fig 12. maximum drain current vs. case temperature fig 10. typical source-drain diode forward voltage fig 11. maximum safe operating area fig 15. maximum avalanche energy vs. drain current fig 14. typ. forward transconductance vs. drain current 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 v sd , source-to-drain voltage (v) 0 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 175c t j = 25c t j = -40c v gs = 0v 25 50 75 100 125 150 175 t c , case temperature (c) 0 10 20 30 40 50 i d , d r a i n c u r r e n t ( a ) -75 -50 -25 0 25 50 75 100 125 150 175 200 t j , temperature ( c ) 0.5 1.0 1.5 2.0 2.5 3.0 t y p i c a l v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 25a i d = 250a i d = 1.0ma i d = 1.0a 0 10203040 i d ,drain-to-source current (a) 0 20 40 60 80 g f s , f o r w a r d t r a n s c o n d u c t a n c e ( s ) t j = 25c t j = 175c v ds = 15v 380s pulse width 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 300 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 1.9a 3.0a bottom 12a 0 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) operation in this area limited by r ds (on) tc = 25c tj = 175c single pulse 100sec 1msec 10msec dc
irf6702m2dtr/tr1pbf 6 www.irf.com fig 16. typical avalanche current vs.pulsewidth fig 17. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 16, 17: (for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 19a, 19b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 16, 17). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figure 11) p d (ave) = 1/2 ( 1.3bvi av ) =   t/ z thjc i av = 2  t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 0.1 1 10 100 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? j = 25c and tstart = 150c. 0.01 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? tj = 150c and tstart =25c (single pulse) 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 10 20 30 40 50 60 70 80 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1.0% duty cycle i d = 12a
irf6702m2dtr/tr1pbf www.irf.com 7 fig 18a. gate charge test circuit fig 18b. gate charge waveform fig 19b. unclamped inductive waveforms fig 19a. unclamped inductive test circuit fig 20b. switching time waveforms fig 20a. switching time test circuit 1k vcc dut 0 l s 20k vds vgs id vgs(th) qgs1 qgs2 qgd qgodr r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v t p v (br)dss i as   
 1     0.1 %    
 + -     v ds v gs 90% 10% t d(off) t d(on) t f t r
irf6702m2dtr/tr1pbf 8 www.irf.com fig 19.    for n-channel hexfet   power mosfets p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period    
     

 

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irf6702m2dtr/tr1pbf www.irf.com 9 directfet  part marking   

 




  please see an-1035 for directfet assembly details and stencil and substrate design recommendations gate marking part number logo batch number date code line above the last character of the date code indicates "lead-free" code a b c d e f g h j k l m r p s min 0.246 0.189 0.152 0.014 0.023 0.019 0.043 0.019 0.015 0.055 0.114 0.0235 0.0008 0.003 0.006 max 6.35 5.05 3.95 0.45 0.62 0.52 1.12 0.52 0.42 1.50 3.00 0.676 0.080 0.17 0.195 min 6.25 4.80 3.85 0.35 0.58 0.48 1.08 0.48 0.38 1.40 2.90 0.616 0.020 0.08 0.155 max 0.250 0.199 0.156 0.018 0.024 0.020 0.044 0.020 0.017 0.059 0.118 0.0274 0.0031 0.007 0.008 metric imperial dimensions
irf6702m2dtr/tr1pbf 10 www.irf.com data and specifications subject to change without notice. this product has been designed and qualified to msl1 rating for the consumer market. 
      
    
        
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 " qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 07/2010 directfet  tape & reel dimension (showing component orientation). reel dimensions note: controlling dimensions in mm std reel quantity is 4800 parts. (ordered as IRF6702M2DTRPBF). for 1000 parts on 7" reel, order irf6702m2dtr1pbf b c max n.c n.c 0.520 n.c n.c 0.724 0.567 0.606 imperial h min 330.0 20.2 12.8 1.5 100.0 n.c 12.4 11.9 standard option (qty 4800) code a b c d e f g h max n.c n.c 13.2 n.c n.c 18.4 14.4 15.4 min 12.992 0.795 0.504 0.059 3.937 n.c 0.488 0.469 metric g e f min 6.9 0.75 0.53 0.059 2.31 n.c 0.47 0.47 tr1 option (qty 1000) max n.c n.c 12.8 n.c n.c 13.50 12.01 12.01 min 177.77 19.06 13.5 1.5 58.72 n.c 11.9 11.9 metric max n.c n.c 0.50 n.c n.c 0.53 n.c n.c imperial a d loaded tape feed direction a e note: controlling d im en sio n s in m m code a b c d e f g h f b c imperial min 0.311 0.154 0.469 0.215 0.201 0.256 0.059 0.059 max 8.10 4.10 12.30 5.55 5.30 6.70 n.c 1.60 min 7.90 3.90 11.90 5.45 5.10 6.50 1.50 1.50 metric dimensions max 0.319 0.161 0.484 0.219 0.209 0.264 n.c 0.063 d h g


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